Exploiting Interposer Technologies to Disintegrate and Reintegrate Multi-core Processors for Performance and Cost
My research focused on computer architecture, specifically on how silicon interposer technology could enable new multi-chip processor designs. Most of this work was done during my MASc at the University of Toronto in collaboration with Prof. Natalie Enright Jerger and Gabriel Loh at AMD Research.
Journal & Top Picks
Conference Papers
Enabling Interposer-based Disintegration of Multi-core Processors
NoC Architectures for Silicon Interposer Systems: Why Pay for More Wires When You Can Get Them for Free?
Interconnect-Memory Challenges for Multi-chip, Silicon Interposer Systems
Offloading to the GPU: An Objective Approach
Not Quite My Tempo: Matching Prefetches to Memory Access Times
Evaluation of Mobile Games Using Playability Heuristics